Dynamic Compilation for VLIW Processors

This project aims at exploring the possibilities of applying JIT translation of Java Bytecode (and related virtual machine instructions) on systems based on VLIW processors, exploiting the instruction-level parallelism as much as possible.

In particular, we implemented JIST, a scheduling JIT compiler, based on the open source Java Virtual Machine implementation Kaffe, and targeted to the Lx platform, a family of Very Long Instruction Word processors jointly developed by Hewlett Packard and STMicroelectronics. Within this framework, three main issues are considered: register allocation, instruction scheduling (both local and global), and memory disambiguation.

We are also investigating the impact of selective compilation and optimization on the performances of our virtual machine.

Project home page

Bibliography

  1. G. Agosta, S. Crespi Reghizzi, D. Domizioli and M. Sykora. Global Instruction Scheduling in Dynamic Compilation for Embedded Systems. In proceedins of the 4th Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2006), Paris, Oct 2006.
  2. Giovanni Agosta, Stefano Crespi Reghizzi, Paolo Palumbo, Martino Sykora. “Selective Compilation via Fast Code Analysis and Bytecode Tracing”. In 21st ACM Symposium on Applied Computing, April 2006, Dijon, France
  3. Giovanni Agosta, Stefano Crespi Reghizzi, Gerlando Falauto, Martino Sykora. “Just-In-Time Scheduling Translation for Parallel Processors”. In Scientific Programming 3(13), 2005, IOS Press
  4. Dario Domizioli. “Superblock Scheduling in Just-in-Time Compilation of Java Bytecode for a VLIW processor”, Politecnico di Milano, July 2005
  5. Paolo Palumbo. “Profile-Guided Selective Run-Time Compilation of Java Bytecode”, Politecnico di Milano, July 2005
  6. Gerlando Falauto, Martino Sykora. “Run-time compilation and scheduling of Java Bytecode for a VLIW machine”, Politecnico di Milano, December 2003
  7. Giovanni Agosta. “Dynamic Compilation for Architectures with Instruction-Level Parallelism”. Doctoral dissertation, Politecnico di Milano, March 2004
  8. Giovanni Agosta, Stefano Crespi Reghizzi, Gerlando Falauto, Martino Sykora. “Just-In-Time Scheduling Translation for Parallel Processors”. In 3rd International Symposium on Parallel and Distributed Computing (ISPDC 2004), July 2004, Cork, Ireland